CISC, RISC

A complex instruction set computer (CISC /ˈsɪsk/) is a computer architecture in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.[citation needed] The term was retroactively coined in contrast to reduced instruction set computer (RISC)[1] and has therefore become something of an umbrella term for everything that is not RISC,[citation needed] where the typical differentiating characteristic[dubious  – discuss] is that most RISC designs use uniform instruction length for almost all instructions, and employ strictly separate load and store instructions.

In computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set computer (CISC), a RISC computer might require more instructions in order to accomplish a task because the individual instructions are written in simpler code. The goal is to offset the need to process more instructions by increasing the speed of each instruction, in particular by implementing an instruction pipeline, which may be simpler to achieve given simpler instructions.